Enne Wittenhagen received the B.Sc. of electrical engineering in 2016 and the M.Sc. of electrical engineering in 2019, both from the Technische Universität Berlin.
During his studies he concentrated on analog circuit design. In his master thesis, he designed a frontend for a high linear 6 GS/s Pipeline ADC. Besides his master studies he worked as a student assistant at the chair of mixed signal circuit design.
He joined the chair of mixed-signal circuit design in january 2019.