Mixed Signal Circuit Design
© Christian Kielmann
Research Assistant
Research Interests
- High speed Analog to Digital Converters
- Time-Interleaved Successive Approximation-Register (SAR) ADCs
- High resolution pipeline ADCs
Vita
Frowin Buballa received the B.Sc. in electrical engineering 2016 and the M.Sc. in electrical engineering 2018, both from the Technische Universität Berlin.
During his studies he did an internship for four months at the Mikroelektronik Anwendungszentrum im Land Brandenburg (MAZBr) in the design-test department.
For his master thesis he development a Driver for GaN-HEMTs in cooperation with the Ferdinand-Braun-Institute.
He joined the chair of mixed-signal circuit design in December 2018 as research assistant. He is currently working on the GSADU Project, developing a GS/s SAR-ADC.
Publikationen
2023
Wittenhagen,
E.;
Kurth,
P.;
Hecht,
U.;
Buballa,
F.;
Linnhoff,
S.;
Lotfi,
N.;
Gerfers,
F.
A 12 GS/s RF-Sampler Employing Inductive Peaking with >57 dB |THD| and >49.3 dB SNDR in 22 nm FD-SOI CMOS
21th IEEE Interregional NEWCAS Conference (NEWCAS)
Publisher: IEEE
2023
A 12 GS/s RF-Sampler Employing Inductive Peaking with >57 dB |THD| and >49.3 dB SNDR in 22 nm FD-SOI CMOS
21th IEEE Interregional NEWCAS Conference (NEWCAS)
Publisher: IEEE
2023
Wittenhagen,
E.;
Artz,
P.;
Kurth,
P.;
Linnhoff,
S.;
Buballa,
F.;
Scholz,
P.;
Gerfers,
F.
A Bulk-Controlled 12 GS/s Track and Hold Amplifier with >58 dBc SFDR and >53.5 dB SNDR in 22 nm FD-SOI CMOS
18th European Microwave Integrated Circuits Conference (EuMIC)
Publisher: IEEE
2023
A Bulk-Controlled 12 GS/s Track and Hold Amplifier with >58 dBc SFDR and >53.5 dB SNDR in 22 nm FD-SOI CMOS
18th European Microwave Integrated Circuits Conference (EuMIC)
Publisher: IEEE
2023
Kurth,
P.;
Hecht,
U.;
Buballa,
F.;
Linnhoff,
S.;
Ordouei,
H.;
Gerfers,
F.
A Charge Pump for Sub-Sampling Phase-Locked Loops with Virtual Reference Frequency Doubling
2023 IEEE International Symposium on Circuits and Systems (ISCAS), Page 1-5
Publisher: IEEE
2023
A Charge Pump for Sub-Sampling Phase-Locked Loops with Virtual Reference Frequency Doubling
2023 IEEE International Symposium on Circuits and Systems (ISCAS), Page 1-5
Publisher: IEEE
2023
2022
Buballa,
F.;
Linnhoff,
S.;
Hoffmann,
T.;
Wentzel,
A.;
Heinrich,
W.;
Gerfers,
F.
A 4 GBaud 5 Vpp Pre-Driver for GaN based Digital PAs in 22 nm FDSOI using LDMOS
16th European Microwave Integrated Circuits Conference (EuMIC)
Publisher: IEEE
2022
A 4 GBaud 5 Vpp Pre-Driver for GaN based Digital PAs in 22 nm FDSOI using LDMOS
16th European Microwave Integrated Circuits Conference (EuMIC)
Publisher: IEEE
2022
2021
Buballa,
F.;
Linnhoff,
S.;
Reinhold,
M.;
Gerfers,
F.
A 12 Bit 500 MS/s Sub-2 Radix SAR ADC for a Time-Interleaved 8 GS/s ADC in 28 nm CMOS
IEEE International Symposium on Circuits and Systems (ISCAS)
Publisher: IEEE
2021
A 12 Bit 500 MS/s Sub-2 Radix SAR ADC for a Time-Interleaved 8 GS/s ADC in 28 nm CMOS
IEEE International Symposium on Circuits and Systems (ISCAS)
Publisher: IEEE
2021
Linnhoff,
S.;
Sippel,
E.;
Buballa,
F.;
Reinhold,
M.;
Vossiek,
M.;
Gerfers,
F.
A 12 Bit 8 GS/s Randomly-Time-Interleaved SAR ADC with Adaptive Mismatch Correction
IEEE International Symposium on Circuits and Systems (ISCAS)
Publisher: IEEE
2021
A 12 Bit 8 GS/s Randomly-Time-Interleaved SAR ADC with Adaptive Mismatch Correction
IEEE International Symposium on Circuits and Systems (ISCAS)
Publisher: IEEE
2021
2020
Linnhoff,
S.;
Buballa,
F.;
Reinhold,
M.;
Gerfers,
F.
A 12 bit 8 GS/s Time-Interleaved SAR ADC in 28 nm CMOS
27th International Conference on Electronics, Circuits and Systems (ICECS)
Publisher: IEEE
2020
A 12 bit 8 GS/s Time-Interleaved SAR ADC in 28 nm CMOS
27th International Conference on Electronics, Circuits and Systems (ICECS)
Publisher: IEEE
2020
