Mixed Signal Circuit Design

Rechnerorganisation

Course no.
0401 L 410

Contact Persons:
Prof. Friedel Gerfers
Tobias Kaiser

Teaching format:
Lecture (2 SWS) + Exercise (2 SWS)

Where (Lecture):
H 0105 (Audi-Max)

When (Lecture):
Tuesday 08:00 - 10:00

Start:
17.10.2023 (Lecture)

Module
Rechnerorganisation (#40019)

ISIS Course:
ISIS course registration is required to participate in this module:
 

Exam modalities

The examination in the module Rechnerorganisation is a portfolio exam. Participation in the exam elements requires a binding examination registration.

Registration start:
Enrollment End Date:
End of withdrawal:

Details can be found on the ISIS course exam information page.

Description

Learning Outcomes:

Students will be able to program programmable digital systems in assembler language. They will be able to describe how a program written in a high-level programming language is translated into machine language and executed by a digital system. Furthermore, they will be able to derive the logic operations involved in processing machine instructions in a digital system at the register transfer level and develop extensions. In addition, students will be able to interpret the number representations used in digital systems and solve arithmetic operations using underlying microalgorithms. They will be able to represent the basic structure of digital systems, including input/output organization, memory hierarchy, and elementary structural principles of computers.

Teaching Content:

  • Basics in the design of digital systems (combinatorial logic, gates, truth tables, memory elements, finite state machines)
  • Basic technologies and components of a computer architecture
  • Assembler programming: assembler language, control constructs, addressing modes
  • Computational arithmetic: number representations (place value systems, fixed and floating point numbers) - Understanding and evaluating computational performance (SPEC benchmarks, Amdahl's Law).
  • Design and operation of a simple von-Neumann-computer
  • Structure and functionality of a multi-cycle implementation
  • Assembly line processing (pipelining), pipeline conflicts and their solutions
  • Memory hierarchy, caches, virtual memory
  • Input/output techniques (addressing, synchronization, direct memory access)